Tutorials:Cadence:SchematicSimulationDCAnalysis

Schematic Simulation: Creating a Test File for Simulating an Inverter

Now that we have built an inverter, we need to simulate it to show that our design is valid. First we need to create a new cell in our CSE463library for testing the inverter. In the Library Manager, highlight the test library and left click on Library Manager:File → New → Cell View.

In the Cell Name type inv_test and in the View Name type schematic. Left click on OK.

A new schematic editing tool will appear. You are going to instance the inverter that was previously created and connect its input pin to voltage source. The output pin will be connected to a capacitor.

Left click Editing:Add->Instance. Click on the Library pull down menu and select the CSE463 library. Select the inv cell. The Component Browser window should look like the one bellow.

Place the inverter in the middle of the editing window. Note: you can press F3 key while you have selected the symbol you want to place and the Add Instance window will appear. In this window, you can edit some of the properties of the symbol if applicable.

Now we want to add voltage DC sources. Left Click Editing: Add → Instance. In NCSU_Analog_Parts library; you will find vdc sources. Place them in the test circuit. Left Click Editing:Add → Instance. In NCSU_Analog_Parts library, under Voltage_Sources category, you will find vdc source. Place them in the test circuit. The Component Browser should look like the one below:

Select Vdc and Add Instance window will appear. In the DC Voltage field enter 5V. This window should appear as such:

Place the symbol to the left of the inverter.

Now we want to add global ground and power lines. Left Click Editing: Add → Instance. In NCSU_Analog_Parts library, under Supply_Nets category, you will find vdd and gnd sources. Place them in the test circuit. The Component Browser should look like the one below.

Once you select the NCSU_Analog_Parts selection and select Supply_Nets, you will find gnd and vdd symbols. The Add Instance windows for vdd and gnd should look like the ones below:

Left Click Hide and place the vdd and gnd symbols on the schematic. Place the vdd above the vdc symbol and gnd bellow the vdc symbol.

Next, we want to add capacitor to the output pin in order to simulate a load (other circuits) that our inverter has to charge or discharge. Left click Editing:Add → Component. From the NCSU_Analog_Parts library choose a cell named cap and specify its value to be 1 pF. The Add Instance window should look like the one below:

Next we will add an output pin in the schematic. Left click Editing:Add → Pin. Name the pin out and specify it as an output pin. Place the pin next to the output of the inverter.

Connect all the elements as shown in the figure below. To connect different elements use Editing:Add → Wire. The final schematic should like the one below:

Save the schematic and you are ready to simulate the inverter.

In the schematic of inv_test, left click Editing:Launch → ADE L. The spectre window should appear.

We want to specify the type of analysis we want to perform. We are going to select a DC analysis. Left click Analog Artist:Analyses → Choose? Click on the dc button for Analysis. Click Component Parameter button for sweep variable. In the Sweep Range, fill 0 and 5V for the start and stop. Left click on the Select Component. Now go back to the schematic and select the voltage source you want to sweep. Click on the vdc that is connected to the input of the inverter. This will pop-up a small window, which requests the Parameter Name. Click on dc to sweep the voltage. Go back to your Analysis Choose window, which should look like the one below, and click on OK.

Second, we want to select which output voltages to be plotted. Left click on Analog Artist: Outputs → To be Plotted → Select on Schematic. Click on the wire between your vdc source and the in pin of your inverter. Then click on the wire between the out pin of the inverter and the out pin. Both wires should change color indicating that these voltages will be plotted.

Note: If you want to select a current to be plotted, then click on the square of a symbol where the current is flowing through. There will be a circle around the square node indicating that a current is selected.

Your Analog Environment window should appear similar to:

Note: in order to make your simulation more readable, it is often advisable to name special nets with uniquely identifiable names, so that when the simulation results are presented, they are more easily understood.

You are ready to run the simulation. Left Click Simulation → Run or click on the green traffic light icon in the Analog Environment window. The result window, as the one below will appear shortly. Explore the pull down menus in this window in order to customize your results. For instance, left click Axes → Strip in order to separate the different curves.

To plot the results left click Waveform Window: Window → hardcopy. Select the option to Send Plot Only to File and also don't forget to disable the header option in order not to waste paper. You might also disable Mail Log To to prevent it from mailing you about the status of printing.

Now exit the Cadence Spice. Left click on Analog Environment:Session → Quit. Remember NOT to save the current state. If you choose to save the current state, several hundreds of megabytes will be used in order to save your last simulation.

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