How to install a PCell

To install my NMOS, PMOS, and CAP pcells into Cadence:

1. In the pcell SKILL script, change the name of the library to the intended destination library.
2. Check the layer map in the pcell SKILL script to make sure it corresponds to Cadence layers.
3. In the CIW window, execute load "pcell_name.il" to load the PCell. Since this is a SKILL script, it will automatically create the PCell in the library specified in the SKILL script.

For AMI 0.5um C5N process technology, the layer maps are provided for the C5F/N rules on MOSIS website. If using the Scalable CMOS rules (SCMOS), then the layer maps are provided for SCN3M and SCN3ME.

The NCSU Cadence Design Kit (CDK) uses the SCMOS rules. When checking the cadence layer numbers it is not clear which number corresponds to which layer in the SCMOS rules. To resolve this, I had to look up these layers. The GDS layer in the SCMOS rules on the MOSIS website is compared to the GDSII layer of the "streamInLayermap" file located in "<ncsu>/pipo" or the CIF layer in the SCMOS rules is compared to the CIF layer of the "cifOutLayermap" file also located in "<ncsu>/pipo" to determine the Cadence layer name and purpose. It will be something like "metal1 drawing".

Next, look up the Cadence layer name in the "layerDefinitions.tf" technology file in "<ncsu>/techfile" to determine the layer #. The layer # in this case is the internal representation of the layer in Cadence. It is this layer number that is used to define layers in PCell SKILL scripts.