Tutorials:Cadence:AdvancedTopics

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Advanced Topics

Pad frame

One tiny chip unit is 1.5mm x 1.5mm. The pad frame provided here has a total of 40 pins. The 4 corner pins are used for VDD and GND (note the +/- symbols in the layout) and the remaining 36 pins are available for I/O.

To use the pad frame, please do the following steps:

  1. Download Padframe_C5N.tgz into $HOME/cadence/library.
  2. Type "cd $HOME/cadence/library".
  3. Type "tar -xzvf Padframe_C5N.tgz". This will extract the pad library.
  4. Type "cd ..".
  5. Edit cds.lib and add the following line:

    DEFINE pad library/pad
    
  6. Execute virtuoso. The pad library will now appear in the Library Manager.


The pad frame layout is shown below.

Tutorials-Cadence-Padframe-001.png

Vector File Simulation

Now we are introducing a new simulation method under Cadence Spectre Simulator: Using Vector File. Vector file is a very convenient way to do large scale digital simulation, the manual for how to write digital vector file can be download from here:

Media:Digital_vector_file_guide.pdf

In Cadence, first we create a NAND2 cell schematic view:

Vector-simulation1.png

In this NAND2, we have two input ports: A and B, one output ports: C. Then in vector file, we assign values to A and B. The example vector file NAND2.vec:

Vector-simulation2.png

In a basic vector file, you need define the radix, i/o, tunit, and value for the input or output ports, moreover, you can also define your rise/fall time, high/low voltage. Next, we open the Cadence ADE L:

Vector-simulation9.png

Then left click Setup->stimuli..., the window of stimuli will jump out:

Vector-simulation3.png

Then left click to select the Globe Sources at the first row, then select vdd!, click select enable, fill the DC voltage with a value, here we just define it 3V, (Note: by giving the value to vdd! here, we don't need to load vdc module anymore), then click apply:

Vector-simulation4.png

After we click OK, the window will disappear, we left click Setup-> Simulation Files, then select "Vector Files" tab at the top row, add NAND.vec as the Vector Files:

Vector-simulation5.png

Click OK, then left click choose Analyses-> Choose..., on the "Choosing Analyses" tab, select tran, then fill the stop time with a value, here we fill it as 40n s:

Vector-simulation6.png

Click OK, then select the ports you want to view in the schematic by using Outputs-> To Be Plotted-> Select On Schematic, then click Netlist and Run button:

Vector-simulation7.png

Finally, we get the waveform of this NAND2 gate:

Vector-simulation8.png



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